A Compact-Physics Framework for Modeling
Charge Trapping Related Reliability Phenomena
in MOS Devices

Comphy in a nutshell: Metal-oxide-semiconductor (MOS) devices are affected by generation, transformation, and charging of oxide and interface defects. These processes contribute to the device degradation and manifest itself in the form of bias temperature instability (BTI), random telegraph noise (RTN) and hysteresis.
Comphy (short for compact-physics) is a Python framework developed by TU Wien and imec for the unified simulation of these charge trapping effects based on the non-radiative multi-phonon theory (NMP). The applications of the framework cover the simulation of bias temperature instability for negative (NBTI) and positive (PBTI) gate voltages, hysteresis, lifetime extrapolation, extraction of defect parameters, AC stress with arbitrary signals and duty cycles, and gate stack engineering. For a more complete description of the framework visit the Features section.

Get started with Comphy

Workflow in Comphy Step 1: Specify physical properties
  • Channel
    • doping & workfunction
    • material properties
  • Gate Stack
    • layer thicknesses
    • permittivities
    • band edges
    • tunnel masses
  • Defects
    • density & location
    • energy distribution
    • material parameters
Step 2: Simulate transient signal
  • Input:
    • time dependent temperature T
    • time dependent gate voltage VG

  • Simulation Options:
    • fast self-consistent mode (FSCP): accounts for the reduction in electric field due to oxide charges, but does not consider the impact on the occupancy of this reduction self-consistently.
    • AC mode: fast computation of high-frequency long-term AC signals (trillions of cycles can be computed in seconds)
    • fast and reproducible defect sampling on a grid
    • random defect sampling with Monte-Carlo approach

  • Output:
    • threshold voltage shift \( \Delta V_\mathrm{th} \) as a function of time